The present invention relates generally to systems and methods for translating a virtual address in a computer system and, more particularly, to systems and methods of translating a virtual address into a real or absolute address of a block of data in a computer system having a dynamic address translation facility wherein virtual address translation occurs via a hierarchy of translation tables.
Dynamic Address Translation (DAT) provides the ability to interrupt the execution of a program at an arbitrary moment, record it and its data in auxiliary storage, such as a direct access storage device, and at a later time return the program and the data to different main storage (memory) locations for resumption of execution. The transfer of the program and its data between main and auxiliary storage may be performed piecemeal, and the return of the information to main storage may take place in response to an attempt by the CPU to access it at the time it is needed for execution. These functions may be performed without change or inspection of the program and its data, do not require any explicit programming convention in the relocated program, and do not disturb the execution of the program except for the time delay involved.
With appropriate support by an operating system, the dynamic address translation facility may be used to provide to a user a system wherein storage appears to be larger than the main storage which is available in the configuration. This apparent main storage is often referred to as virtual storage, and the addresses used to designate locations in the virtual storage are often referred to as virtual addresses. The virtual storage of a user may far exceed the size of the main storage which is available in the configuration and normally is maintained in auxiliary storage. The virtual storage is considered to be composed of blocks of data, commonly called pages (also referred to as segments and regions). Only the most recently referred to pages of the virtual storage are assigned to occupy blocks of physical main storage. As the user refers to pages of virtual storage that do not appear in main storage, they are brought in to replace pages in main storage that are less likely to be needed. In some cases, virtual storage is assigned to main storage for a long period of time (or permanently), regardless of whether the storage is referenced. The swapping of pages of storage may be performed by the operating system without the user's knowledge.
Programs use addresses (or virtual addresses) to access virtual storage. The program may fetch instructions from virtual storage or load data or store data from virtual storage using virtual addresses. The virtual addresses associated with a range of virtual storage define an address space. With appropriate support by an operating system, the dynamic address translation facility may be used to provide a number of address spaces. These address spaces may be used to provide degrees of isolation between users. Such support can consist of completely different address space for each user, thus providing complete isolation, or a shared area may be provided by mapping a portion of each address space to a single common storage area. Also, instructions are provided which permit a semi-privileged program to access more than one such address space.
Dynamic address translation provides for the translation of virtual addresses from multiple different address spaces. On an IBM® System z processor, for example, these address spaces are called primary address space, secondary address space, and Access Register specified address spaces. A privileged program can also cause the home address space to be accessed. Dynamic address translation may be specified for instruction and data addresses generated by the CPU.
As is common in the art, DAT is performed by using successive portions of the virtual address as indices to select entries in a series of translation tables (for example, region first, region second, region third, segment and page tables). Each intermediate table entry, if marked valid, contains the origin, offset and length of the next-lower-level table, which is then indexed by the next portion of the virtual address, until a “leaf” entry is reached, containing a real or absolute frame address. The remaining portion of the virtual address is then used as a byte index into that frame to complete the translation result.
Virtualization is used to improve efficiency and flexibility in computing environments. Prior to virtualization, a single operating system typically ran in a machine. In a virtualized environment, a hypervisor program or host is in control of machine resources. This host creates multiple virtual machines, containers in which separate, independent operating system instances, called guests, can run, sharing resources such as processors and memory under control of the host.
In a pageable-guest (virtual machine) environment on, for example, an IBM® System z processor, dynamic address translation occurs at two levels: a guest virtual page is backed by a guest real frame, and these guest frames are in turn represented as host virtual memory, divided into host virtual pages which are backed by host real frames. Since address translation is managed independently by guest and host, a guest frame of either size may be mapped into host virtual area comprised of pages of either size. Thus, a guest frame might consist of one host page, many host pages (large guest frame in small host pages), or a portion of a host page (small guest frames in a large host page). Memory can be managed more efficiently, and the translation lookaside buffer (TLB) in the machine can be used more efficiently, when the host uses the same size page as the guest frame it backs. So, for example, a guest 1 Megabyte frame is treated as a unit by the guest, and should be backed by a host 1 Megabyte frame, rather than 256 separately paged 4 Kilobyte frames. This allows a single TLB entry to map the entire megabyte of guest virtual addresses to the corresponding host absolute addresses.
In order that the host page size conforms to the guest frame size, the host must be able to determine what size frames the guest intends to use in different areas of guest memory. In some cases, the guest may utilize a frame management instruction which indicates the intended guest frame size, and handling of that instruction by the firmware or the host can then provide a host frame conforming in size to back the guest frame. However, if the guest does not use this instruction at time of deployment, or if it later changes the frame size, host and guest sizes may no longer conform. In particular, if the host has paged out a portion of guest memory and the guest then references it, a host translation exception ensues, so that the host has the opportunity to provide backing memory with the preferred guest frame contents. This interruption affords an additional opportunity for the host to assign a frame conforming in size to the guest frame.
What is needed is an enhanced dynamic address translation facility which provides additional functionality, heretofore unknown to this art, which effectively and efficiently informs the host processor to allocate a properly sized frame with which to back the guest frame in response to whether the interruption was caused by executing in a host or guest configuration and, if in a guest configuration, whether the interruption pertains to a guest large or small frame identified by a leaf guest DAT-table entry, or to a guest frame referenced in some other way.